use aam, aad and salc
they're no `aadb` nor `aamb` instructions, also 0xd6 is the undocumented `salc` instruction
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32
src/core/vendor/DisassembleX86-64.mjs
vendored
32
src/core/vendor/DisassembleX86-64.mjs
vendored
@ -246,7 +246,7 @@ const Mnemonics = [
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["ROL","ROR","RCL","RCR","SHL","SHR","SAL","SAR"],
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["ROL","ROR","RCL","RCR","SHL","SHR","SAL","SAR"],
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["ROL","ROR","RCL","RCR","SHL","SHR","SAL","SAR"],
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["ROL","ROR","RCL","RCR","SHL","SHR","SAL","SAR"],
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["ROL","ROR","RCL","RCR","SHL","SHR","SAL","SAR"],
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["ROL","ROR","RCL","RCR","SHL","SHR","SAL","SAR"],
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"AAMB","AADB","???",
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"AAM","AAD","SALC",
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"XLAT",
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"XLAT",
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/*------------------------------------------------------------------------------------------------------------------------
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/*------------------------------------------------------------------------------------------------------------------------
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X87 FPU.
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X87 FPU.
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@ -4752,36 +4752,6 @@ function DecodePrefixAdjustments()
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}
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}
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}
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}
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//The L1OM vector prefix settings decoding.
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if( Opcode === 0xD6 )
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{
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//-------------------------------------------------------------------------------------------------------------------------
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Opcode = BinCode[CodePos]; //read L1OM byte settings.
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NextByte(); //Move to the next byte.
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//-------------------------------------------------------------------------------------------------------------------------
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Opcode |= ( BinCode[CodePos] << 8 ); //Read next L1OM byte settings.
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NextByte(); //Move to the next byte.
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//-------------------------------------------------------------------------------------------------------------------------
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WidthBit = SIMD & 1;
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VectorRegister = ( Opcode & 0xF800 ) >> 11;
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RoundMode = VectorRegister >> 3;
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MaskRegister = ( Opcode & 0x0700 ) >> 8;
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HInt_ZeroMerg = ( Opcode & 0x0080 ) >> 7;
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ConversionMode = ( Opcode & 0x0070 ) >> 4;
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RegExtend = ( Opcode & 0x000C ) << 1;
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BaseExtend = ( Opcode & 0x0003 ) << 3;
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IndexExtend = ( Opcode & 0x0002 ) << 2;
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//-------------------------------------------------------------------------------------------------------------------------
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Opcode = 0x700 | BinCode[CodePos]; //read the 8 bit opcode.
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NextByte(); //Move to the next byte.
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//-------------------------------------------------------------------------------------------------------------------------
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return(null);
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}
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//Only decode L1OM instead of MVEX/EVEX if L1OM compatibility mode is set.
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//Only decode L1OM instead of MVEX/EVEX if L1OM compatibility mode is set.
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if( Mnemonics[0x62] === "" && Opcode === 0x62 )
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if( Mnemonics[0x62] === "" && Opcode === 0x62 )
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